1. Field of the Invention
The present invention relates to the processing of semiconductor wafers, and in particular to a system for detecting the presence and position of a wafer in a wafer slot of a cassette or pod, and for storing, or mapping, the position of the wafer in memory for later use.
2. Description of Related Art
A SMIF system proposed by the Hewlett-Packard Company is disclosed in U.S. Pat. Nos. 4,532,970 and 4,534,389. The purpose of a SMIF system is to reduce particle fluxes onto semiconductor wafers during storage and transport of the wafers through the semiconductor fabrication process. This purpose is accomplished, in part, by mechanically ensuring that during storage and transport, the gaseous media (such as air or nitrogen) surrounding the wafers is essentially stationary relative to the wafers, and by ensuring that particles from the ambient environment do not enter the immediate wafer environment.
A SMIF system has three main components: (1) minimum volume, sealed pods used for storing and transporting wafers and/or wafer cassettes; (2) an input/output (I/O) minienvironment located on a semiconductor processing tool to provide a miniature clean space (upon being filled with clean air) in which exposed wafers and/or wafer cassettes may be transferred to and from the interior of the processing tool; and (3) an interface for transferring the wafers and/or wafer cassettes between the SMIF pods and the SMIF minienvironment without exposure of the wafers or cassettes to particulates. Further details of one proposed SMIF system are described in the paper entitled "SMIF: A TECHNOLOGY FOR WAFER CASSETTE TRANSFER IN VLSI MANUFACTURING," by Mihir Parikh and Ulrich Kaempf, Solid State Technology, July 1984, pp. 111-115.
SMIF pods are in general comprised of a pod door which mates with a pod shell to provide a sealed environment in which wafers may be stored and transferred. So called "bottom opening" pods are known, where the pod door is horizontally provided at the bottom of the pod, and the wafers are supported in a cassette which is in turn supported on the pod door. It is also known to provide "front opening" pods, in which the pod door is located in a vertical plane, and the wafers are supported either in a cassette mounted within the pod shell, or to shelves mounted in the pod shell itself.
In order to transfer wafers between a SMIF pod and a process tool within a wafer fab, a pod is typically loaded either manually or automatedly onto a load port on a front of the tool. The process tool includes an access port which, in the absence of a pod, is covered by a port door. Once the pod is positioned on the load port, mechanisms within the port door unlatch the pod door from the pod shell and move the pod door and port door together into the process tool where the doors are then moved away from the wafer transfer path and stowed. The pod shell remains in proximity to the interface port so as to maintain a clean environment including the interior of the process tool and the pod shell around the wafers. A wafer handling robot within the process tool may thereafter access particular wafers supported in wafer slots in the pod or cassette for transfer between the pod and the process tool.
During fabrication, semiconductor wafers may undergo more than 300 process steps before the wafer is cut into individual integrated circuit chips, and the wafers must be transferred to and from the SMIF pod for each of these process steps. Each time a group of wafers are removed from and returned to a pod for the individual processes, there is a danger that one or more of the wafers will be damaged or destroyed. Silicon semiconductor wafers are extremely valuable, with each wafer costing upwards of one-thousand dollars. More significantly, as devices are formed on the wafer surfaces, the worth of a particular lot of wafers within a pod may exceed one-million dollars. It is therefore critical to avoid damage or loss to the wafers during fabrication.
One source of wafer damage is as a result of the wafer being improperly seated in the wafer slots within a pod or cassette. Wafers may be loaded into the slots of a pod or cassette either manually or automatedly, by for example a pick and place robot. Where the wafers are loaded into the wafer slots manually, there is a danger that the wafers will be "cross slotted" or "double slotted". A cross slotted wafer is one which is seated in a first slot on one side of the cassette or pod, and a second slot on the opposite side of the cassette or pod that is higher or lower than the first slot. The result is that the wafer is not horizontal or parallel to the other properly seated wafers in the cassette or pod. When a pick and place robot goes to access a cross slotted wafer, it is possible that the robot will collide with the wafer, and/or that the wafer will not properly seat on the robot. Either situation is likely to result in damage or destruction of the cross slotted wafer and possibly those around it. A double slotted wafer is a wafer that lies directly on top of another so that two wafers are located in a single set of wafer slots. This situation prevents processing on the wafers, and results in loss of one or both wafers.
Separate and apart from the issue of wafer damage due to improperly placed wafers, a pod or cassette may include several empty wafer slots. In this event, unless the absence of a wafer from a particular set of wafer slots is detected, time will be wasted in having the end effector of the pick and place robot enter the cassette to access a wafer that is not in fact there.
In order to prevent damage as a result of improperly positioned wafers, and in order to avoid a waste of time accessing phantom wafers, it is known to provide sensing systems to detect the presence and position of wafers in the wafer slots. This information may then be stored, as in a computer memory, to provide a wafer map for a particular pod or cassette for later use. The type and location of conventional wafer mapping systems varies in the prior art. Some conventional wafer mapping systems have utilized standalone stations for detecting the presence and position of wafers once the pod or cassette is loaded thereon. An example of such a system is disclosed in U.S. Pat. No. 5,225,691 to Powers et al. That reference discloses a pair of columns mounted to a base with the columns spaced apart sufficiently to receive a wafer cassette therebetween. One column houses a plurality of transmitters and the other column houses a plurality of receivers. After a wafer cassette is seated on the base between the columns, the presence, position and horizontal orientation of the wafers may be determined by turning on respective transmitters at different times. A drawback to systems such as disclosed in U.S. Pat. No. 5,225,691 is that these systems add significantly to the process time and cost of equipment. It is also possible that the wafers move after transport away from the mapping station so that the mapped position of a particular wafer may not be the position of the wafer at the next subsequent processing station.
In addition to standalone mapping stations, it is known to integrate a mapping system into a load port of a particular process tool. For example, U.S. Pat. No. 5,772,386 to Mages et al. discloses an indexing sensor mounted inside a processing tool which looks through the processing tool access port and into the pod to map wafers as the platform on which the wafers are mounted is indexed up and down along a vertical axis. Such a system would not work for front opening load port systems, which do not include indexers that move the wafer along the vertical axis during wafer transfer into the process tool.
In front opening systems, it is known to provide a wafer mapping system on a wafer handling end effector, which indexes along the vertical axis in order to provide presence and positional information about the wafers within a particular pod or cassette. However, these systems map the wafers within a pod in a separate step dedicated to wafer mapping after the port door has been opened and prior to accessing of the wafers. As such, these types of systems require additional processing steps and time in order to provide a map of the wafers within a pod or cassette.